1. Field of the Invention
The present invention relates to a semiconductor device for use in an optical application and a method for fabricating the device.
2. Description of the Related Art
In order to meet the requirements of future computing systems, higher speed and more energy efficient alternatives to electrical interconnects, such as on-chip optical interconnects and chip-to-chip optical interconnects, will be needed. Integrated optics, particularly silicon photonics, can suitably meet such needs. For the cost-effective, mass-fabrication of CMOS-based chips having a performance capability suitable for use in high-speed devices and/or applications, integrated optical interconnects with compatible light sources are to be provided. A problem in this regard is that, due to the indirect band-gap of silicon, no silicon-based light sources are available and/or can be used. This problem has been addressed by the use of III-V based semiconductor material systems typically being provided as light sources for use in conjunction with silicon photonics and, more generally, integrated optics based on a silicon platform. However, an associated problem in this regard is posed by the lattice mismatch between III-V compound semiconductors and silicon, making the direct, monolithic integration of III-V based light sources on a silicon platform non-trivial. In previously-proposed approaches for facilitating such integration, bonded III-V based light sources or blanket gain materials have been used. In this regard, it can be time-consuming and challenging to achieve relatively high-precision alignment when bonding a pre-processed III-V based light source to a given waveguide structure, particularly since the alignment precision can be further limited by the bonding process. For bonding a blanket III-V material on a pre-processed silicon-based waveguide, the alignment marks located on the silicon wafer that are provided for the lithography step involved in the patterning of the III-V layer can be used. Because the alignment accuracy of light sources based on compound semiconductor systems, such as III-V materials, with respect to optical structures, for example, silicon waveguides and/or resonators, can be rather dependent on lithography accuracy, it can be insufficient for certain applications.
Referring to the document titled, “Defect reduction of GaAs epitaxy on Si (001) using selective aspect ratio trapping”, by Li et al. published in Appl. Phys. Lett., vol. 91, 021114, 2007, in which III-V epitaxy in oxide trenches on silicon has been reported using aspect ratio trapping. Reference is also made to the document titled, “Monolithic integration of GaAs/InGaAs lasers on virtual Ge substrates via aspect-ratio trapping”, by Li et al. published in J. Electrochem. Soc. 156, H574, 2009, in which the formation of GaAs/InGaAs quantum well lasers, by metallorganic chemical vapour deposition, on virtual Ge substrates on silicon has been demonstrated via aspect ratio trapping and epitaxial lateral overgrowth. These documents are respectively concerned with addressing other known problems associated with the fabrication of structures having compound semiconductor material systems, such as III-V material systems, on silicon, which can cause performance deterioration of devices in which such structures are integrated. Such problems are related to the lattice mismatch and difference in thermal coefficients between III/V material systems and silicon. However, neither of these documents address the problems, as discussed above, associated with the alignment of compound semiconductor systems that are monolithically integrated and optically coupled with optical structures, for example, waveguides and, more generally, photonic structures.
In the document titled, “Si—InAs heterojunction Esaki tunnel diodes with high current densities”, by Bjoerk et al., published in Appl. Phys. Lett., vol. 97, 163501, 2010, III-V nanowire growth on silicon is discussed. The problems and/or issues associated with the alignment of compound semiconductor systems that are monolithically integrated and optically coupled with optical components, such as waveguides and/or photonic structures, are not addressed.
Referring to the documents titled, “Electrically pumped hybrid AlGaInAs-silicon evanescent laser”, by Fang et al., published in Optics Express, vol. 14, issue 20, pp. 9203-9210, 2006, and “Electrically pumped InP-based microdisk lasers integrated with a nanophotonic silicon-on-insulator waveguide circuit”, by Van Campenhout et al., published in Optics Express, vol. 15, issue 11, pp. 6744-6749, 2007. These documents generally disclose the alignment of an active lasing region towards a waveguide using contact lithography, with an alignment accuracy of better than 2 microns being achieved. Turning to the document titled, “Metamorphic DBR and tunnel-junction injection: A CW RT monolithic long-wavelength VCSEL”, by Boucart et al., published in IEEE J. Sel. Topics Quantum Electron, vol. 5, issue 3, pp. 520-529, 1999, III-V light sources on silicon are described. This document publishes the fabrication of a long-wavelength, vertical-cavity, surface-emitting laser (VCSEL), which is monolithically integrated on an indium phosphide (InP) wafer, capable of operating at room temperature, and has a tunnelling junction for reduced losses sustained during operation. This document does not address the issues/problems associated with the alignment of compound semiconductors that are optically coupled to optical structures such as waveguides, and more particularly those based on a silicon platform.
In each of the documents titled, “Design and optical characterisation of photonic crystal lasers with organic gain material”, published by Baumann et al. in Journal of Optics, vol. 12, 065003, 2010, and “Organic mixed-order photonic crystal lasers with ultrasmall footprint”, by Baumann et al., published in Appl. Phys. Lett., vol. 91, 171108, 2007, spin-coating of an organic gain material onto a two-dimensional photonic crystal is reported. While suitable for organic gain material, spin-coating is not compatible with respect to solid state gain materials, such as III-V material systems.
US 2008/0002929 A1 describes an apparatus and a method for electrically pumping a hybrid evanescent laser. For one example, the apparatus includes an optical waveguide disposed in silicon. An active semiconductor material is disposed over the optical waveguide defining an evanescent coupling interface between the optical waveguide and the active semiconductor material such that an optical mode to be guided by the optical waveguide overlaps both the optical waveguide and the active semiconductor material. A current injection path is defined through the active semiconductor material and at least partially overlapping the optical mode such that light is generated in response to electrical pumping of the active semiconductor material in response to current injection along the current injection path at least partially overlapping the optical mode. In this document, the light generated by the active semiconductor material is evanescently coupled to a silicon waveguide that constitutes a passive aspect. Because the active semiconductor material is remotely positioned with respect to the silicon waveguide, it can be that the position of the generated light relative to passive aspect is relatively unchanged. Also, it can be that the overlap of the generated light with the active semiconductor material is relatively small, and so it can be expected that the teaching of the present document is based on a hybrid mode of operation, that is, a mainly passive mode with a relatively smaller active mode. Such a hybrid mode of operation can cause relatively higher threshold currents and lower optical output levels. Alignment issues can not be considered in the present document and, indeed are not addressed, since the position of the generated light is determined by the position of the underlying silicon waveguide. Positioning of the active semiconductor material relative to the underlying silicon waveguide can be facilitated by contact lithography with micron-scale precision in the present case.
US 2008/0198888 A1 discloses a method for bonding a compound semiconductor on a silicon waveguide for attaining a laser above a silicon substrate. This document is concerned with the heterogeneous integration, rather than the monolithic integration, of a light source based on a compound semiconductor material system with respect to a silicon substrate. Furthermore, such heterogeneous integration is achieved by optical contact-lithography, which has associated micron-range alignment tolerances.
US 2009/0245298 A1 discloses a silicon laser integrated device, including: a silicon-on-insulator substrate having at least one waveguide in a top surface, and a compound semiconductor substrate having a gain layer, the compound semiconductor substrate being subjected to a hybrid integration process, wherein the upper surface of the compound semiconductor substrate is bonded to the top surface of the silicon-on-insulator substrate. This document is concerned with the hybrid/heterogeneous integration, rather than the monolithic integration, of a surface of a compound semiconductor substrate with respect to a silicon-on-insulator substrate. Alignment between the compound semiconductor substrate and the silicon-on-insulator substrate is performed by optical contact-lithography, which has associated micron-range alignment tolerances. Based on the index contrasts of the fabricated structures, it can be that the light generated by the laser source/compound semiconductor aspect is mainly confined in the silicon with a relatively small proportion being confined within the compound semiconductor, which can serve to limit the efficiency of the laser and result in relatively increased power consumption.
U.S. Pat. No. 5,703,896 discloses an apparatus for emitting varying colours of light including: a lasing layer formed of crystalline silicon quantum dots formed in an isolation matrix of hydrogenated silicon; the quantum dots being formed in three patches; each of the three patches having different sized quantum dots therein to produce three different colours of light; a barrier layer of p-type semiconductor under the lasing layer, the p-type semiconductor being selected from the group GaP, SiC, GaN, ZnS; a substrate member under the barrier layer; an n-type semiconductor layer above the lasing layer, the n-type semiconductor layer being selected from the group GaP, SiC, GaN, ZnS; a positive potential contact beneath the substrate member, three negative potential contacts; each of the three contacts being above a different one of the three patches; each of the three contacts acting with the positive contact to selectively bias a different one of the three patches; three sectors of concentric grating surrounding the three patches; each of the sectors having a radial period corresponding to the colour of light produced by an adjacent one of the three patches; and each of the sectors resonating photons emitted by the adjacent patch to stimulate coherent light emission. This document is concerned with the fabrication of silicon quantum dots in silicon. It does not address the monolithic integration of a light/laser source based on a compound semiconductor such as, a III-V material system, with respect to an optical structure such as, a photonic structure and/or optical waveguide based on a silicon platform.
US 2007/0105251 discloses a laser structure including: at least one active layer including doped Ge so as to produce light emissions at approximately 1550 nm from the direct band-gap of Ge; a first confinement structure being positioned on a top region of the at least one active layer; and a second confinement structure being positioned on a bottom region of the at least one active layer. This document generally seems to be concerned with a VCSEL device. It does not seem to address the challenges faced in achieving alignment, on a scale of nanometers, of a light source based on a compound semiconductor material system that is monolithically integrated and optically coupled with an optical structure such as a waveguide based on a silicon platform.
US 2007/0104441 discloses an integrated photodetector apparatus including: (a) a substrate having a first cladding layer disposed over a base layer, the base layer having a first semiconducting material, the first cladding layer defining an opening extending to the base layer; (b) an optical waveguide having the first semiconductor material and disposed over the substrate; and (c) a photodetector having a second semiconductor material epitaxially grown over the base layer at least in the opening, the photodetector having an intrinsic region optically coupled to the waveguide, at least a portion of the intrinsic region extending above the first cladding layer and laterally aligned with the waveguide. The disclosed fabrication method is in relation to a germanium photodetector that is laterally coupled to a polycrystalline waveguide and is aligned relative thereto by way of a dedicated, multiple-step alignment procedure. This document does not address how a compound semiconductor based light source can be monolithically integrated and/or aligned, with an alignment tolerance on a scale of nanometers, with respect to integrated optics based on a silicon platform.
U.S. Pat. No. 5,259,049 discloses an electro-optical device including: a substrate; a laser grown on the substrate, and having an active region, an etched mirror, and a laser ridge thereon, wherein the shape of the laser ridge is transferred to the substrate so as to form a substrate ridge, the laser generating a beam; and an optical waveguide coupled to the mirror, and being deposited on the substrate ridge so as to be laterally aligned by the substrate ridge to the laser ridge, the optical waveguide effectively shaping the beam generated by the laser the optical waveguide including a lower cladding layer grown on top of the substrate ridge, a waveguide core disposed on top of the lower cladding layer, and an upper cladding layer disposed on top of the waveguide core, wherein the cladding layers and the waveguide core include material having refractive indices which match the refractive indices of the laser, wherein the upper and lower cladding layers have approximately the same refractive indices, and wherein the difference between the refractive index of the waveguide core and the refractive index of the upper cladding layer is equal to the difference between the refractive indices of the active layer of the laser and the upper cladding layer, respectively. This document discloses a device in which a pre-fabricated laser is coupled to a waveguide structure. The waveguide structure is arranged on top of the laser and is aligned thereto by way of a ridge feature associated with the laser.
U.S. Pat. No. 6,163,639 discloses a process for fitting connectors to optical elements to an integrated optical circuit consisting of connecting at least one optical element to this circuit such that the outputs and/or inputs of each element are located approximately in the same plane as the inputs and/or outputs of this circuit, also located in the same plane, characterised in that it includes the following steps: the circuit is positioned on a template with patterns that enable subsequent precise alignment of optical elements with inputs and/or outputs of the circuit, at least one block capable of holding the optical element(s) is positioned on the template facing the inputs and/or outputs of the circuit and is fixed to this circuit; the template is removed, and the optical element(s) is (are) placed in each block, the blocks then being aligned with the inputs and/or outputs of the circuit. This document discloses a passive alignment method for an optically active photonic circuit towards a waveguide section. Encompassed within the context of passive optical components in this document are waveguides or fibres and not cavities and/or nanophotonic on-chip waveguides. Regarding the passive optical components, they are inserted into dedicated alignment marks provided on the host substrate. The alignment marks are v-grooves etched into the host substrate, which can mean that the alignment tolerances are lithography dependent. Generally, this document does not address the monolithic integration of a light source based on a compound semiconductor material system with respect to integrated optics based on a silicon platform, and instead is concerned with providing hybrid integration of bulk photonic components with fibres. The described approach can be considered to be analogous with a packaging method for coupling an active III-V based chip with silica glass fibres. Alignment tolerances with the described approach can be insufficient for relatively large index contrast integrated photonic components.
US 2004/0218648 A1 discloses a laser diode including: a substrate; a lower material layer formed on the substrate; a resonance layer formed on the lower material layer, an upper material layer formed on the resonance layer and having a ridge at the top, a buried layer having a contact hole corresponding to the ridge of the upper material layer; a protective layer formed of a material different from the material of the buried layer, and having an opening corresponding to the contact hole of the buried layer; and an upper electrode formed on the protective layer to contact an upper surface of the ridge through the contact hole. This document discloses a device architecture and fabrication method for a low-leakage laser diode. An alignment process is described which relates to only the electronic injection part of the laser diode and not in respect of the material used as light source/laser with respect to the material including the integrated optics. It is also not addressed how optical coupling between the laser and the surrounding optical medium/integrated optics can be achieved.
Referring to the document titled, “Hybrid III-V semiconductor/silicon nanolaser”, by Halioua et al., published in Optics Express, vol. 19, 9221, 2011, in which an optically pumped one-dimensional photonic cavity laser is vertically coupled to a pre-structured straight silicon waveguide. Alignment of the laser with respect to the silicon waveguide is performed by electron-beam lithography using markers formed in the silicon waveguide, with an overlay accuracy of better than 50 nm potentially being achieved. Although the <50 nm alignment precision is by far better than what can be achieved with optical contact lithography, it can still not be considered suitable for high quality-factor, low modal-volume micro-resonators, for example. Furthermore, electron-beam lithography is labour intensive, time-consuming, and expensive.
Accordingly, it is a challenge to monolithically integrate an optically active material, having a relatively high non-linearity, optical gain, light emission, with respect to surrounding passive optical/photonic structures/components, for example, waveguides and cavities. It is also desirable that such a task is performed with an alignment tolerance that is on the scale of nanometers and with the alignment procedure being conducted without dedicated alignment steps/lithographic processes and so as to be compatible with mass-fabrication.